1. Field of the Invention
The present invention relates to a full press-pack type semiconductor device and a method of fabricating the same. More particularly, the invention relates to an improvement in a pressure engagement structure for the full press-pack type semiconductor device.
2. Description of the Background Art
A flat-pack type power semiconductor device is constructed such that a semiconductor body is sandwiched between upper and lower external electrodes. Such a semiconductor device, in which a large current flows through the semiconductor body, generates a large quantity of heat. When the external electrodes are brought into direct contact with the semiconductor body, there is generated a thermal stress between the external electrodes and the semiconductor body because they have different coefficients of thermal expansion, resulting in damage to the semiconductor body.
It is a customary practice to insert distortion buffering plates between the external electrodes and the semiconductor body so that the distortion buffering plates absorb the thermal stress. When the distortion buffering plates and the semiconductor body are joined together by soldering and the like, the thermal stress increases. Hence the full press-pack type semiconductor devices have found wide usage, in which electrical connection between the distortion buffering plates and the semiconductor body is held by only a geometrical contact therebetween.
FIG. 4 is an exploded sectional view of a conventional full press-pack type semiconductor device (diode module) disclosed in Japanese Patent Application Laid-Open No. 62-10927. The diode module 1 of FIG. 4 includes a semiconductor body 2, first and second distortion buffering plates 5, 6, an external anode electrode 10A and an external cathode electrode 10K. The diode module 1 is constructed such that the semiconductor body 2 is held under pressure between the external cathode electrode 10K and external anode electrode 10A through the first and second distortion buffering plates 5 and 6.
The semiconductor body 2 includes a discoid semiconductor substrate such as a silicon substrate in which at least one pn junction is formed. A cathode electrode (not shown) provided by metal deposition is formed on the upper surface of the semiconductor body 2, and an anode electrode (not shown) provided by metal deposition is formed on the lower surface thereof. A surface protective material 4 is applied to the peripheral edge of the semiconductor body 2 concentrically with the semiconductor body 2.
The conductive external anode and cathode electrodes 10A and 10K respectively include base portions 11A and 11K and projecting portions 12A and 12K formed integrally with the base portions 11A and 11K. Flanges 13A and 13K are fixed to the outer periphery of the base portions 11A and 11K, respectively.
The semiconductor body 2 is disposed above the projecting portion 12A of the external anode electrode 10A through the second conductive distortion buffering plate 6. A locating ring 8 is fitted over the projecting portion 12A, and the surface protective material 4 is fitted over the locating ring 8. This provides for the radial (lateral) positioning of the semiconductor body 2 relative to the external anode electrode 10A.
A casing 7 made of ceramic is of a cylindrical configuration. A flange 7a is fixed to the top end face of the casing 7, and a flange 7b is fixed to the bottom end face thereof. The casing 7 accommodates the semiconductor body 2 and other parts, and the flange 7b is fixedly brazed to the flange 13A of the external anode electrode 10A.
Inside the casing 7, the first conductive distortion buffering plate 5 is superimposed on the upper surface of the semiconductor body 2, and the projecting portion 12K of the external cathode electrode 10K is superimposed on the first distortion buffering plate 5. In this state, the flange 13K of the external cathode electrode 10K is fixedly brazed to the flange 7a of the casing 7.
The diode module 1 having such a construction, when used in a predetermined equipment, is inserted between anode and cathode members 15A and 15K of the predetermined equipment. The anode and cathode members 15A and 15K are urged in (+Z) and (-Z) directions, respectively, by an external spring not shown. The lower surface of the cathode member 15K comes into contact with the upper surface of the external cathode electrode 10K under pressure, and the upper surface of the anode member 15A comes into contact with the lower surface of the external anode electrode 10A under pressure. The pressures maintain electrical contact between the external cathode electrode 10K and semiconductor body 2 through the first distortion buffering plate 5 and electrical contact between the external anode electrode 10A and semiconductor body 2 through the second distortion buffering plate 6. When a voltage is applied across both members 15A and 15K in this state, a current flows from the cathode member 15K to the anode member 15A by way of the external cathode electrode 10K, first distortion buffering plate 5, semiconductor body 2, second distortion buffering plate 6, and external anode electrode 10A.
Heat generated from the semiconductor body 2 is dissipated through the distortion buffering plates 5, 6 and external electrodes 10K, 10A toward the members 15A and 15K.
The thermal stress generated between the external electrodes 10A, 10K and the semiconductor body 2 is absorbed by the distortion buffering plates 5, 6.
One of the problems to be solved with the full press-pack type semiconductor device is the positional fixation of the semiconductor body. Since the semiconductor body is not fixed to the casing in the full press-pack type semiconductor device, the semiconductor body is liable to position shifts. It is hence necessary to take measures against the position shifts.
In the conventional full press-pack type semiconductor device of FIG. 4, the lateral positioning of the semiconductor body 2 is intended by the fitting of the locating ring 8 and surface protective material 4. The device 1, however, takes no vertical positioning measures for the semiconductor body 2. The force to hold the semiconductor body 2 in between is transmitted from the external electrodes 10A and 10K, which are only fixed to the casing 7 through the flanges 13A and 13K, therefore the fixing force is relatively small.
The external electrodes 10K and 10A sometimes come up off the casing 7 due to the vibration of the semiconductor device 1 in transit. This causes decrease in the force to hold the semiconductor body 2 between the external electrodes 10K and 10A, accompanied by the formation of clearance between the external electrodes 10K, 10A, distortion buffering plates 5, 6 and semiconductor body 2. The further vibration, if continuously applied, causes the semiconductor body 2 and distortion buffering plates 5, 6 to vibrate independently between the external electrodes 10K and 10A. The semiconductor body 2 repeatedly collides against the distortion buffering plates 5 and 6, so that the semiconductor body 2 is damaged.
When the semiconductor body 2 is pressed upwardly due to the vibration in transit with the clearance formed above the semiconductor body 2, the surface protective material 4 applied to the peripheral edge of the semiconductor body 2 slips off the locating ring 8 from the top end. The position of the semiconductor body 2 is shifted also laterally, so that the characteristics of the device deteriorates.
It is not only the semiconductor device of FIG. 4 that has these problems. The problems are common to the full press-pack type semiconductor devices in which the semiconductor body and the members disposed above and below the semiconductor body are not fixed to each other.